The present invention is related to U.S. Provisional Patent Applications Numbers 60/017,120 and 60/013,982 and U.S. Pat. No. 5,268,310 the disclosure of which are specifically incorporated herein by reference. The use of silicon as a material in microwave and of applications in the past had generally been discouraged. This is due to the fact that silicon has a greater electrical conductivity than other materials used in the industry, for example gallium arsenide. This conductivity results in power dissipation and heating effects at high frequencies. Accordingly, gallium arsenide has been the preferred material for fabrication of devices and integrated circuits and the microwave and rf industries. However, in the recent past, heterolithic microwave integrated circuits (HMIC) have been utilized to enable high frequency integrated circuits using silicon as the base material for the circuits. In HMIC applications, silicon pedestals are fabricated having glass material suitable for high frequency application disposed between the pedestals to form the electrical isolation between the pedestals and as the dielectric for signal lines on the integrated circuit. Examples of such HMIC structures are as disclosed above in the above U.S. Provisional Patent Applications, the disclosures of which are specifically incorporated by reference.
While the above referenced patent applications enable reliable high yield and mass produced integrated circuits for applications at high frequency, there are certain drawbacks to fabrication of devices on the integrated circuits described above. To this end, it is often required to have a semiconductor homojunction and heterojunction barrier device fabricated at one or more of the silicon pedestal sites. This is generally done by epitaxial growth of suitably doped Si or Si--Ge on the n.sup.+ doped pedestals. During the processing at high temperature, the semiconductor homojunction and heterojunction doping profiles are often degraded. By way of example, the doping profile of an ideal Schottky barrier is as shown in FIG. 4. In the n.sup.- region, the material is lightly doped. A relatively sharp interface is achieved in the high doped substrate region as is shown. The degraded doping profile is as shown superposed on the ideal doping profile. While it is desired to have the silicon based HMIC's, it is none the less required to have a functional homojunction and heterojunction doping profile in many applications. Accordingly, there is a need to fabricate a doping profile at the pedestal/semiconductor barrier which is not degraded during the fabrication of the HMIC.